Just a few years ago, the industry was accustomed to levels of 5-6g/W, but all this has changed recently, driven by several factors running concurrently.

This article explains a new model developed by our research team which factors in every key aspect of material efficiency, and allows for highly accurate forecasting going forward.

At the heart of the new analysis is our bottom up tracking of manufacturers throughout the entire c-Si value-chain, and allocation of cell technologies across all variants that affect module efficiency and wafer thickness. This unprecedented detail is then backed up through wafering, ingot production and finally arriving at polysilicon g/W levels that can be compared to legacy top-down back-of-envelope estimates undertaken in the industry.

The analysis pulls out actual cell production, cell-to-module interconnection losses by technology, mono/multi usage (including n-type and p-type cell variants), diamond-wire saw adoption, kerf losses and many other factors that influence the ongoing reduction in polysilicon (g/W) used by the industry as a whole.

While the output from the analysis is fascinating to see how things have evolved - to end up with the current (blended) level today of 4.16g/W – the key advantage of the multi-variable input model is in forecasting, and assessing where the industry goes after 2018, when it is expected that polysilicon production (including the small allocation used by semiconductor applications) will reach 512kMT.

The major downward push on polysilicon g/W consumption is coming from two factors: diamond wire saws, and cell efficiency improvements (more mono, and PERC in particular). By the end of 2018, almost all wafer manufacturing (mono and multi) will be using diamond wires, almost all mono will be PERC and multi will be well through its own PERC upgrade phase. The changes here dwarf incremental improvements seen at other stages (ingot casting/pulling, cell-to-module losses, and wafer thickness reductions).

The graphic below looks at the percentage contributions coming from the various stages through the value chain, where the conclusions from the above come over clearly.

The rate of decline in g/W levels should slow down somewhat after 2018, with the industry largely having upgraded to diamond wires; the ongoing declines here coming now from annual kerf loss reductions that are much less pronounced.

Without any cell efficiency increases being factored in, increased share of p-mono alone will keep downward pressure on g/W levels. Cell efficiency increases will be less impactful also, with the move to glass/glass modules and bifaciality being factors more interesting to site owners when considering energy yields.

The upside will however come from higher penetration of n-type variants, although it is not clear if the efficiency benefits (on circa. 180 micron wafers) will be significantly higher than leading p-mono offerings.

This then takes us firmly back to wafer thickness reductions being the wildcard to any long-term polysilicon consumption analysis. Just how much longer can the industry go, without the inevitable shift to 140 microns as the likely first wafer reduction upgrade path.

Being a diamond wire cut sector going into 2019, the prospects for thinner wafers are much more encouraging than any other point in the past. For anyone looking at technology disruption over the next few years, this must be high up on the list. It is also worth noting that cell lines are more automated now, and this is one of the other key factors needed to move to thinner wafer use.

If the industry does embark on a wafer reduction path from 2019, it would basically halt all new polysilicon capacity expansion plans, over and above what is under construction and due to come online over the next 18 months.

Consider this as an example. If the solar industry goes through a 2X annual growth factor in the five year period now (going from 100GW in 2017 to 200GW in 2022), then polysilicon required by the solar industry in 2022 would decline from approx. 670kMT (under a conservative g/W forecast using 180 micron wafers) to about 550kMT (if wafer reduction has largely moved to using 140 micron substrates).

This clearly highlights the frailty of polysilicon expansions beyond 2018-2019, with the industry comfortably on track to ship approximately 475kMT this year.

The caveat here of course is how much demand elasticity has set in, driven by the consequential material cost declines and solar as a whole being more competitive globally.

■ Polysilicon producers need to be cell experts to survive

However the next few years pans out for polysilicon consumption, it is bindingly clear that polysilicon producers need to be experts in what is happening with cell technology (from the basics of mono cell share, through to the plans for wafer thickness reduction), as cell line improvements will remain the dominant driver for g/W levels in the short to mid-term.